OpenTapeOut Conference Titelbild
Welcome to

OpenTapeOut Conference

06.-07.November 2021

In the last few years Application-Specific-Integrated-Circuits (ASICs) have become one of the most interesting fields to work in for Physicists, Computer-Scientists, Electrical- and Nano-Engineers. It was only a question of time before toolchains for the design of ASICs were democratized.

This event is for anyone interested in learning and sharing how to design ASICs with open source tools.

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What is happening at OpenTapeout?

Day 1 - Saturday 6th November
Streaming on youtube
Time (CET) Speaker Title
19:00 Tim 'mithro' Ansell Keynote
19:40 Tom Spyrou & Matt Liberty An update on the OpenROAD project
20:20 David Hulton Fault Injection: Attacks and Defenses
20:30 Lucas Klemmer Programmable Waveform Analysis using WAL
20:40 Joe FitzPatrick 101 ways to flip your bits and 100 ways to prevent it
Day 2 - Sunday 7th November
Streaming on youtube
Time (CET) Speaker Title
19:00 Mohamed Kassem Making open source chips work
19:20 Thomas Parry Talking to satellites with open silicon
19:40 Pepijn de Vos Analog IC design in the 21st century
20:00 Jean-Paul Chaput Coriolis, a FOSS RTL-to-GDSII Toolchain
20:20 Luke Leighton Overview of the Libre-SOC Project
20:40 John McMaster Efabless MPW physical implementation

Who is invited?

We encourage all of you folks to join us at what we hope will be the start of a revolution! No matter who you are or where you are from, don’t care what you did, as long as you love ASICs and electronics in general.

We don’t expect you to have any serious pre-knowledge in ASIC design. Actually we’d love to have you as a guest, especially if you are thinking about starting a new career in ASICs or FPGAs.

Speakers

  • Our Host
    Matt Venn
    Matthew Venn is a science & technology communicator and electronic engineer. He brings 20 years of engineering experience to create excellent and innovative learning experiences for people all over the world. He taped out on the Google/Efabless shuttle MPW1, MPW2 and is preparing for MPW3. He can teach you how to design chips and how to get them made on his www.zerotoasiccourse.com.
  • Thomas Parry Talking to satellites with open silicon Thomas Parry is a mixed-signal designer working at SystematIC Design based in Delft, Netherlands. His work involves taking designs from customer idea conception through to product validation. He's worked with a wide range of customers including Broadcom, OSRAM, European Space Agency and a number of early stage start-ups. He straddles the divide between analogue and digital and is as comfortable deep in RTL, high-performance analogue design or layout. He is a keen proponent of open-source and community led initiatives and is a key contributor to the Phase4 amateur radio project which aims at deploying a modern amateur radio satellite into geo-stationary orbit and beyond. He is also an enthusiastic supporter of the Skywater 130nm project and is attempting to design the world's first truly open-source amateur radio transceiver IC.
  • Pepijn de Vos Analog IC design in the 21st century Pepijn de Vos is a software developer and IC designer who is working on open source EDA tools. He started his own software consultancy right out of school and after a few years went to study electrical engineering and IC design at the university of Twente, where he learned about the wonders of electronics and the horrors of EDA software. With his background in software development, he made it his mission to develop better software for IC designers. During his internship he developed Apicula, an open source flow for Gowin FPGAs, and after graduating, he received an NLnet grant to develop Mosaic, an open source schematic entry and simulation tool.
  • Luke Leighton Overview of the Libre-SOC Project Luke Kenneth Casson Leighton specialises in Libre Ethical Technology. He has been using, programming and reverse-engineering computing devices continuously for 44 years, has a BEng (Hons), ACGI, in Theory of Computing from Imperial College, and recently put that education to good use in the form of the Libre-SOC Project: an entirely Libre-Licensed 3D Hybrid CPU-VPU-GPU based on OpenPOWER. He writes poetry and has been developing a HEP Physics theory for the past 36 years in his spare time.
  • Jean-Paul Chaput Coriolis, a FOSS RTL-to-GDSII Toolchain Jean-Paul Chaput holds a Master Degree in MicroElectronics and Software Engineering. He joined the LIP6 laboratory within SU (formerly UPMC) in 2000. Currently he is a Research Engineer in the Analog and Mixed Signal Team at LIP6. His main focus is on physical level design software. He is a key contributor in developing and maintaining the Alliance/Coriolis VLSI CAD projects for CMOS technologies. In particular he contributed in developing the routers of both Alliance/Coriolis and the whole Coriolis toolchain infrastructure. He his now a key contributor in extending Alliance/Coriolis to the Analog Mixed-Signal integration for nanometric CMOS technologies.
  • John McMaster Efabless MPW physical implementation John McMaster is hardware reverse engineer specializing in microcontroller data extraction using microscopes, lasers, and power analysis. At the ASIC level he's particularly interested in mask ROMs and other memory structures. Past projects also include documenting the Xilinx 7 series FPGA bitstream format for prjxray. Twitter: @johndmcmaster
  • Joe Fitz 101 ways to flip your bits and 100 ways to prevent it Joe FitzPatrick (@securelyfitz) is an Instructor and Researcher at SecuringHardware.com. Joe has spent over a decade working on low-level silicon debug, security validation, and penetration testing of CPUS, SOCs, and microcontrollers. He has spent the past decade developing and leading hardware security-related training, instructing hundreds of security researchers, pen-testers, hardware validators worldwide. When not teaching classes on applied physical attacks, Joe is busy developing new course content or working on contributions to the NSA Playset and other misdirected hardware projects, which he regularly presents at all sorts of fun conferences.
  • Tim 'mithro' Ansell Keynote Tim Ansell is a Software Engineer at Google. His research interests include open-source EDA tooling, open-source RTL design, and software speed hardware accelerator development. Ansell received the B.A. degree in philosophy and cognitive science and the B.Eng. degree in information technology and telecommunications from the University of Adelaide. He is a member of IEEE.
  • Mohamed Kassem Making open source chips work Mohamed Kassem is the cofounder and CTO of efabless corporation. The world’s first community-centric hardware design company applying collective community expertise & creativity to all aspects of semiconductor design. The company simplifies the process of developing smart hardware and opens it to anyone. Prior to launching efabless in 2014, Mohamed held several technical and global leadership positions within Texas Instruments’ Wireless Business Unit. He joined TI in 2000 at the beginning of the digital telephony revolution fueled by the unprecedented integration of major phone functions on a single SoC. He led the first development of 45nm, 28nm analog & mixed-signal IP functions for wireless applications processors. Mohamed holds a Masters degree in Electrical Engineering from the University of Waterloo, Ontario, Canada.
  • David Hulton Fault Injection: Attacks and Defenses David Hulton organizes the ToorCon suite of security conferences and has spent over 20 years doing security research mostly focused on reverse engineering and cryptanalysis. He's mostly known for developing some of the first wireless attack tools (bsd-airtools) in the early 2000's, presenting the first practical attack on GSM A5/1 in 2008, and releasing a DES cracking service and tools to perform a full break of MSCHAPv2 authentication in 2012. More recently, his company Pico Computing was acquired by Micron Technology in 2015 and since then has been building their hardware security red team where his focus is on developing new techniques for attacking hardware devices and ways to protect them.
  • Tom Spyrou An update on the OpenROAD project Tom Spyrou is the chief architect and technical program manager for the OpenROAD system. Tom is a well-known EDA system architect. He was most recently a Senior Principal Engineer in Intel’s Programmable Solutions business unit working on the Quartus FPGA compiler. Tom has worked for over 30 years as an EDA Technologist and has gained extensive experience in areas including Static Timing Analysis, Logic Synthesis, Power Grid Analysis, Database Technology and Floor-planning. He has led the development of leading edge commercial engines and products such as PrimeTime, Voltage Storm, First Encounter, and the Open Access Database. Tom has been driving EDA algorithms to utilize parallel programming approaches with both multi-process and multi-threaded techniques. He has a BS from Carnegie Mellon University in ECE and an MS from Santa Clara University.
  • Lucas Klemmer Programmable Waveform Analysis using WAL Lucas Klemmer is a PhD student at the Institute for Complex Systems (ICS) at the Johannes Kepler University in Linz, Austria. He received his Master’s degree in computer science from the University of Bremen in Germany. Currently, his research interest includes RISC-V, verification at the HW/SW interface, and new EDA approaches.

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